The present invention relates to a method and/or architecture for output buffers generally and, more particularly, to buffer crossing point compensation for supply voltage variations.
FIG. 1 shows a block diagram of a conventional output buffer 10 in a differential configuration. The output buffer 10 has an output current source 12 connected to a pair of output transistors 14A-B. Each of the output transistors 14A-B presents a signal (i.e., OUTA and OUTB). Each of the output transistors 14A-B has a gate driven by a pre-drive inverter 16A-B. The left pre-drive inverter 16A receives a signal (i.e., INA) and presents a signal (i.e., GA) to the gate of the left output transistor 14A. The right pre-drive inverter 16B receives a signal (i.e., IND) and present a signal (i.e., GB) to the gate of the right output transistor 14B. The signal INA and the signal INB are commonly complementary signals. Under ideal conditions, the signal GA and the signal GB will also be complementary signals. As a result, the signal OUTA and the signal OUTB will be complementary signals.
Referring to FIG. 2, a transfer characteristic of the pre-drive inverters 16A-B is shown. The pre-drive inverters 16A-B are designed to operate at a specific supply voltage (i.e., VCC) with respect to a ground voltage (i.e., GND). A curve 20 represents the transfer characteristics of the pre-drive inverters 16A-B for a supply voltage VCC (i.e., 3.0 volts). A curve 22 a represents the transfer characteristics of the pre-drive inverters 16A-B for a higher supply voltage VCC (i.e., 3.3 volts). A curve 23 represents the transfer characteristics for the pre-drive inverters 16A-B for an even higher supply voltage VCC (i.e., 3.6 volts). The curves 20, 22, and 24 are symmetrical about a line 26 where the signal IN equals the signal G. The curves 20, 22, and 24 cross-over the line 26 at different values for the signal IN as indicated by lines 28, 30, and 32 respectively. As the supply voltage VCC increases from 3.0 volts to 3.6 volts, a threshold VM of the pre-drive inverters 16A-B moves up from 1.47 volts to 1.8 volts.
Referring back to FIG. 1, the crossing point of the pre-drive inverters 16A-B moves up with increasing supply voltage VCC due to increases in the threshold VM. Defining a second crossing point as that point where signal OUTA equals signal OUTB, then the second crossing point is also dependent upon the crossing point of the pre-drive inverters 16A-B. As the supply voltage VCC changes, so too will the second crossing point.
Referring to FIG. 3, transient characteristics of the pre-drive inverters 16A-B are shown. A pair of curves 34 and 36 represent step responses of the pre-drive inverters 16A-B at the supply voltage VCC of 3.0 volts. A pair of curves 38 and 40 represent step responses of the pre-drive inverters 16A-B at the supply voltage VCC of 3.3 volts. A pair of curves 42 and 44 represent step responses of the pre-drive inverters 16A-B at the supply voltage VCC of 3.6 volts. Defining a third crossing point as a time where the step-up response crosses the step-down response, then the curves 34-44 show that the third crossing point will also vary with changes in the supply voltage VCC.
The present invention concerns a circuit comprising a current source, a first amplifier, and a second amplifier. The circuit may be used to provide for crossing point compensation of a CMOS driver as a function of a supply voltage. The current source may be configured to present a reference current. The first amplifier may be configured to (i) receive the reference current as a load, (ii) receive a first voltage, and (iii) present a second voltage responsive to the first voltage. The second amplifier may be configured to (i) receive the second voltage and (ii) change a current at a node responsive to the second voltage.
The objects, features and advantages of the present invention include providing output buffer crossing point compensation that may (i) reduce and/or eliminate dependency of the crossing point upon the supply voltage and/or (ii) require a small part count to implement.